暂无图片
暂无图片
暂无图片
暂无图片
暂无图片

J721E - SBL(2)

囧囧妹 2022-07-02
254

点击上方蓝字【囧囧妹】一起学习,一起成长!

一、SBL框图

二、内存映射


三、目录介绍
    sbl

    ├── board
    │ └── k3
    │ └── sbl_main.c <= define main() for SBL, board specific init

    ├── build
    │ ├── makefile <= makefile for the SBL component
    │ ├── sbl_am65xx.sh <= For legacy, called by Yocto build
    │ ├── sbl_boot_test.mk <= Builds SBL single core tests
    │ ├── sbl_smp_test.mk <= Builds example app for using SBL lib
    │ ├── sbl_mcu0_boot_perf_test.mk <= Builds example app for SBL performance tuning
    │ ├── sbl_mcu0_boot_xip_entry.mk <= Builds example trampoline app to demonstrate transitioning to a XIP app from SBL
    │ ├── sbl_mcu0_boot_xip_test.mk <= Builds example app to demonstrate XIP execution from XIP capable boot media
    │ ├── sbl_img.mk <= builds SBL image that is loaded and executed by ROM code
    │ ├── sbl_lib.mk <= Builds sbl library that other apps can link into
    │ ├── sbl_multicore_smp.mk <= Builds multi-core image from SBL lib eg. test to demonstrate symmetric multiprocessor boot (SMP)
    │ └── sbl_multicore_amp.mk <= Builds multi-core image from single core tests to demonstrate asymmetric multiprocessor boot (AMP)

    ├── example
    │ └── k3MulticoreApp
    │ ├── binary
    │ │ └── [soc]
    │ │ ├── sbl_baremetal_*.appimage <= SBL loadable board specific sample apps for testing SBL boot flow on GP devices
    │ │ ├── sbl_baremetal_*.appimage.signed <= SBL loadable board specific signed sample apps for testing SBL boot flow on HS devices
    │ │ └── sbl_baremetal_*_release.x*.bin <= Binary image that can be eXecuted In Place on XIP capable boot media
    | ├── [soc]
    │ │ ├── mcuAmplinker.lds <= Linker command file when TI CGT is used for Asym. Multiproc. boot
    │ │ ├── mpuAmplinker.lds <= GCC linker command file (for Cortex Axx cores) for Asym. Multiproc. boot
    │ │ ├── mcuXiplinker.lds <= Linker command file for XIP trampoline app
    │ │ └── xip_entry.lds <= Linker command file for XIP test case
    │ ├── mcuBootPerfLinker_j7.lds <= TI CGT Linker command file for SBL performance tuning example (J721E)
    │ ├── mcuBootPerfLinker.lds <= TI CGT Linker command file for SBL performance tuning example (AM65xx)
    | ├── mcuBootPerfLinker_small.lds <= TI CGT Linker command file for SBL performance tuning example (for boot with MCU domain only)
    │ ├── mcu[core#]LockStepLinker.lds <= Linker command file when TI CGT is used for R5 lock-step boot
    │ ├── mpuSmplinker.lds <= GCC linker command file (for Cortex Axx cores) for SMP boot
    │ ├── xip_entry.asm <= Entry point of XIP trampoline app
    │ ├── xip_stub.c <= Simple SBL test app that demonstrates transitioning to a XIP app
    │ ├── sbl_amp_multicore.c <= Simple SBL test that displays UART message
    │ ├── sbl_amp_multicore_sections.h <= Allows same source to be loaded to different sections for different cores.
    │ ├── sbl_mcu_0_boot_perf_benchmark.c <= SBL Test to tune boot performance.
    │ ├── sbl_multicore_a53.asm <= Test case entry point for Cortex-Axx cores
    │ ├── sbl_multicore_r5.asm <= Test case entry point for Cortex-R5 cores
    │ ├── sbl_multicore_r5_sections.inc <= Allows same source to be loaded to different sections for different MCUs.
    │ ├── sbl_printf.c <= Lightweight UART printf function for SBL testing
    │ ├── sbl_smp_multicore.c <= Simple SBL SMP test that uses SBL lib to reset MPUs
    │ └── sbl_smp_r5.asm <= Provides dummy override function for __mpu_init for SMP testcase.

    ├── binary <= ROM bootable SBL images for each board/boot media
    │ ├── [board]
    │ └── [bootmedia]
    │ └── bin
    │ └── sbl_[bootmedia]_img_mcu1_0_release.tiimage

    ├── lib <= SBL lib for each boot media/board supported
    │ ├── [bootmedia]
    │ │ └── [board]
    │ │ └── r5f
    │ │ └── release
    │ │ └── sbl_lib_[bootmedia].aer5f
    │ └── cust
    │ └── [board]
    │ └── r5f
    │ └── release
    │ └── sbl_lib_cust.aer5f

    ├── soc <= SOC specific SBL code
    │ └── k3
    │ ├── [soc]
    | | └── linker.cmd <= Linker file used for generating ROM loadable SBL image.
    │ ├── sbl_err_trap.h <= Error loops for SBL
    │ ├── sbl_init.asm <= SBL Entry point
    │ ├── sbl_misc.asm <= SBL Assembly utility functions
    │ ├── sbl_log.h <= SBL logging framework
    │ ├── sbl_sci_client.c <= Calls system firmware on DMSC
    │ ├── sbl_sci_client.h
    │ ├── sbl_slave_core_boot.c <= Code that contains the sequence to release a core from reset
    │ ├── sbl_slave_core_boot.h
    │ ├── sbl_soc.c <= Cache Ops, PMU init, image verfication, etc & SoC specific code like RAT Init..
    │ ├── sbl_soc_cfg.h <= Abstraction layer for hiding SoC level changes from SBL
    │ └── sbl_profile.h <= SBL profiling framework

    ├── src <= Common drivers used across SOCs
    │ ├── mmcsd
    │ ├── hyperflash
    │ ├── ospi
    │ ├── qspi
    │ ├── uart
    │ ├── rprc <= RPRC image parser used by SBL
    │ └── spi

    └── tools
    ├── btoccs
    ├── byteswap
    ├── ccsutil
    ├── combined_appimage <= Creates a "combined" .appimage file for booting HLOS images (e.g., ATF,U-boot,Linux)
    │ ├── bin
    │ │ └── [board]
    │ │ ├── base-board.dtb <= Default (example) Linux DTB per platform - to be replaced with desired DTB
    │ │ └── combined.appimage <= Output "combined" .appimage for HLOS + RTOS images boot (after build)
    │ ├── config.mk <= Configuration make include file. Use this to specify images to include in combined.appimage
    │ └── makefile <= combined.appimage Makefile
    ├── flashWriter <= Unused for AM65xx/J721E. AM65xx/J721E uses Uniflash to program flashes.
    ├── multicoreImageGen <= Stitches multiple RPRC images for different cores into a single image
    ├── omapl13x_boot_utils <= Unused for AM65xx/J721E
    ├── omapl13x_sd_card_format <= Unused for AM65xx/J721E
    ├── out2rprc <= Converts .out into .rprc files, so that SBL can load non-continuous memory sections
    ├── scripts <= Scripts used by .out generated by CCS projects into SBL loadable images
    │ ├── K3ImageGen.bat
    │ └── K3ImageGen.sh
    └── tiImageGen <= Unused for AM65xx/J721E. Image generation is handled by PDK build framework (<sdk_install_path>/pdk_*/packages/ti/build/)
    四、镜像格式
    为了生成可引导镜像,SBL 构建使用 x509CertificateGen 脚本对 sbl 二进制文件进行签名,以便 ROM 引导加载程序 (RBL) 可以解析它。
    对于 HS 设备,SBL 和系统固件必须使用 MPK 签名。为了获得简单的开箱即用体验,适用于 HS 设备的处理器 SDK 使用 TI 虚拟密钥对 SBL 和系统固件进行签名。使用 TI 虚拟密钥签名的镜像将在 TI 的 GP 和 HS 板上启动。构建系统调用脚本 <PDK>/packages/ti/build/makerules/x509CertificateGen* 进而调用 OpenSSL 来创建 X509 证书。
    为了兼容性,所有签名证书都必须包含一个最小值为 1的软件修订扩展,因为 ROM 将使用它来强制编程到设备 efuse 中的修订以实现防回滚保护。此默认值 1 设置到 SDK 脚本中,但如果 efuse 值需要增加时,必须在设备的生命周期内增加。
    多核应用程序镜像文件结构:
    RPRC 文件头格式
    抵消二进制值
    0x00000000魔数(43525052)
    0x00000004入口点(位置)
    0x00000008预留地址
    0x0000000Csection数量
    0x00000010版本


    RPRC 节头格式
    抵消二进制值
    0x00000000段起始地址
    0x00000004预留地址
    0x00000008大小
    0x0000000C预留的 CRC
    0x00000010预留


    多核启动镜像格式

    meta的头部起始

    偏移二进制值
    0x00000000魔数字符串 (0x5254534D)
    0x00000004文件数
    0x00000008设备ID
    0x0000000C预留


    每个核的meta首部

    偏移二进制值
    0x00000000核id
    0x00000004镜像偏移

    签名应用镜像格式:
    要将多核应用程序映像转换为可验证的格式,构建流程使用 x509CertificateGen 脚本为应用程序映像创建 x509 证书。具有 x509 证书的镜像称为签名镜像。HS 设备必须使用签名的应用程序镜像,但也可以在 GP 设备上使用。
    SBL 会自动检测签名镜像并将其加载到 SBL 构建期间指定的暂存内存区域。默认情况下使用的暂存内存区域在sbl_lib.mk中通过标志SBL_SCRATCH_MEM_START 和 SBL_SCRATCH_MEM_SIZE 指定。还可以为自定义构建指定 SBL_SCRATCH_MEM* 选项以覆盖默认值。
    在应用程序加载期间,SBL 暂存内存对应用程序不可用,因为 SBL 仍处于活动状态。一旦 SBL 将控制权转移到应用程序,该内存就可供应用程序使用 - 换句话说,SBL_SCRATCH_MEM* 在应用程序运行时是可用的。
    觉得不错,点击“分享”,“赞”,“在看”传播给更多热爱嵌入式的小伙伴吧!
    文章转载自囧囧妹,如果涉嫌侵权,请发送邮件至:contact@modb.pro进行举报,并提供相关证据,一经查实,墨天轮将立刻删除相关内容。

    评论